This invention pertains generally to compositions and processes for cleaning copper or copper alloy (hereinafter collectively referred to as copper) surfaces during the fabrication of microelectronic packages and, more particularly, to selective copper microetching at the interface or in the vicinity of noble metals and their alloys typically found at plated edge connectors, contact pads, plated through holes (PTH), and embedded resistors.
As is known in the art, there is a trend to reduce the size of microelectronic packages. This results in xe2x80x9cdensexe2x80x9d microelectronic packages having finer and thinner printed circuit lines, smaller diameter plated through holes, and more multilayering. One problem with making dense printed circuit boards is that the yield from the manufacture of these boards is relatively low due to such problems as poor adhesion of layers in packages, shorting or bridging caused by contaminants, and open circuits due to breaking of the microcircuit lines typically caused by harsh cleaning or galvanic etching. It has therefore become a more difficult problem since cleaning of the microelectronic packages must be performed during their manufacture, yet precise conditions must be maintained otherwise the fragile microcircuits will be irrevocably damaged during such cleaning processes.
At the present time, cleaning of copper on microelectronic substrates is performed either by chemical means, mechanical means or a combination of both. Contaminants present during printed wiring board (PWB) manufacture include photoresist materials, residual organic and residual metallic contaminants such as alkali metals and native/metallic oxides. Metallic films comprising metal oxides and metal halides are also inadvertently deposited onto electronic packages during immersion into etchant or resist stripper baths. If mechanical means have been used for cleaning, there is the possibility that residues of abrasive particles, such as pumice, will be adsorbed on the surface of the copper.
This cleaning process also called xe2x80x9cmicroetching or soft etchingxe2x80x9d is ideally designed to exclusively clean the surface of the copper without diminishing or changing the dimensions of the copper itself or attacking adjacent materials (i.e., there is complete selectivity for eliminating surface contaminants on the copper and no bulk erosion or attack of the electrical microcomponents). The benefit of such idealized cleaning is to provide microelectronic packages with reduced rates of malfunction or failure due to delamination, shorting or open circuits.
For example, it is known that corrosive chlorides can be deposited on microelectronic packages causing weakening or embrittlement of electrical connectors as well as delaminate the layers of the package resulting in current leakages or physical failure. As miniaturization of microelectronic packaging is an important target, the problem of obtaining high levels of selectivity has been exacerbated due to the fragility of microcomponents such as fine-line copper circuits. Compounding the problem of finding an ideal microetching process is the desire to provide a manufacturing process that is fast and efficient. However, typically the faster the cleaning process the lower the selectivity which can ultimately be achieved. This is well known in the art of copper polishing where it is preferred that mild chemical polishing agents are used at longer processing times in order to minimize the loss of bulk copper. It is also recognized that although numerous chemical copper-etchant compositions are known in the art of microelectronic package manufacture they cannot indescriminantly be used in this application since they, by definition, will erode the bulk of the copper. Such etchants include copper or ferric chlorides, chromium salts, alkaline-ammonia, hydrogen peroxide-sulfuric acid or nitric acid compositions, and persulfate salts. Each of these compositions has certain limitations and disadvantages as described hereinbelow.
The metal etchants, in particular the chromium salts, create a deleterious environmental impact. It is also known that chromium salts are human carcinogens; therefore, their use and disposal are especially problematic.
Nitric acid, either alone or in combination with sulfuric acid or copper nitrate, has been reported by Brittey (U.S. Pat. No. 4,695,348) to be useful for etching copper in wiring boards. However, nitrogous oxide gas is a byproduct of this process.
The alkaline-ammonia compositions are used commercially because they are relatively fast, have substantial copper-carrying capacity and are reasonably tolerant of some metal resists and some dry film resists. However, these same compositions have poor selectivity for copper versus other metals and alloys. Significant process control is required to achieve acceptable selectivity. It is also known that these compositions may not work well with fine line copper geometries. Furthermore, the dissolved copper is difficult to recover. Also, fumes from the ammonia composition present worker exposure concerns.
The hydrogen peroxide-sulfuric acid compositions, generating permonosulfuric acid, used in copper etching processes are very clean to operate and can be recycled. However, these same compositions have relatively slow etching rates and require substantial cooling for stability control due to the autodecomposition reaction of the hydrogen peroxide. Additionally, both the performance of the process and the decomposition of the peroxide are very sensitive to trace impurities via homo- or heterocatalysis. Stabilizers are necessary for peak performance but these are metal specific. Brasch (U.S. Pat. No. 4,378,270) teaches phenol-sulfonic acid for copper containing solutions. It is also known from Alderuccio, et al (U.S. Pat. No. 3,269,881) that these compositions are adversely affected by chloride or bromide ion at levels of 2 mg/liter, causing reduced etch rates. Elias (U.S. Pat. No. 4,130,455) teaches that the addition of sodium or potassium thiosulfate can counteract this effect.
But use of these additives does not address the basic problem of the catalytic decomposition of the peroxide discussed hereinabove. This decomposition has two important implications: firstly, the depletion of the peroxide in the etchant solution reduces the etchant rate; and secondly, there is potential for uncontrolled decomposition of large volumes of high temperature solutions, generating high concentrations of oxygen and increasing the safety risks therefrom. Because decomposition of the peroxide is accelerated at elevated temperatures, processing temperatures must be kept low. This adversely affects the rate of the etching process and exacerbates the already low copper-carrying capacity of the peroxide-sulfuric acid composition.
Another problem associated with using aqueous acidic solutions of hydrogen peroxide for microetching is that it typically requires a two step process. After the treatment step, a further step with diluted sulfuric acid or diluted hydrochloric acid is required due to formation of oxide films on the copper surface.
Tytgat and Magnus report in U.S. Pat. No. 4,981,553 that a combination of hydrogen peroxide, chloride ions, phosphoric acid, and phosphate and hydrogenphosphate ions, in quantities to impart a pH of 1.25 to 3, may be used as a copper polishing formulation not requiring excess working temperatures or intense mechanical agitation, however; the process under these conditions is designed to take one or more hours to obtain adequate results. Tytgat et al report that the chloride ion is added for the purpose of protecting the metal against uncontrolled local corrosion and the phosphate ions are added to maintain the desired pH range (i.e., it is added as a buffer). There is no mention or indication that the phosphate ions can function to inhibit etching of other metals in the vicinity of the copper, nor is there teaching that other oxidants can be used in this invention.
Heretofore salts of persulfate have been utilized for microetching purposes. Ammonium persulfate, however, is defective in that copper ammonium complex is formed during neutralization making it difficult to remove copper from the wastewater effluent. Prior art studies indicate that sodium persulfate is inferior to ammonium persulfate as a microetchant and furthermore has a short life.
Another problem typically encountered with chemical microetching and etching formulations is the tendency for accelerated microetching of copper to occur in regions adjacent to, or in the vicinity of, precious metal, noble or more inert metals such as gold or palladium and their alloys or nickel and its alloys especially nickel/phosphorous. This effect known as galvanic etching causes undercutting especially of fine line copper circuitry and in worst cases can completely erode the circuit line. Examples of microelectronic packaging where this can occur include printed wiring boards containing plated through holes, edge connectors, etch masks, commoning bars or embedded resistors comprising nickel/phosphorous alloy resistors.
Conventional microetch formulations such as persulfatelsulfuric acid used for cleaning of copper circuits (i.e., printed circuit cards and boards) in the presence of discrete nickel/gold features (i.e., plated contact tabs or edge fingers), or other precious metals can lead to complete etch out of the copper circuit lines due to the galvanic accelerated etch effect associated with these prior art microetchants in the presence of these precious metals. In fact, when multiple microetch cleaning passes are employed it is common to have the copper circuit features completely etched away in as few as 2-3 cleaning passes.
The long-standing problem of galvanic etching has limited the designs and capabilities of the microelectronic packages and has required additional manufacturing complexity in order to circumvent this problem. For example, one prior art attempt to solve the problem of galvanic etching was to apply a soldermask or protective coating over the interface of the gold plated tabs that were attached to the copper circuit lines. However when the soldermask is brought closer to the gold plated connector, there is a higher probability of causing a plugging problem due to flaking or abrading soldermask.
An example of a limitation in PWB design due to galvanic etching is found during the process of microetching of printed wiring boards using conventional microetchants such as acidic persulfate solutions, undercutting of the nickel/copper interface causes the resultant nickel-clad copper circuit lines to have an uneven cross-section. This defect limits the minimum size of the circuit line and, in doing so, prevents the design of more dense circuits in the printed board package.
Another example of this problem occurs on printed wiring boards having gold plated edge connectors. These
gold fingers are typically connected by 0.006xe2x80x3 (6 mil) wide copper traces to the rest of the wire board. Prior to shipping the finished wire board, the board is processed through an xe2x80x9cENTEKxe2x80x9d process (ENTEK is a trademark of Ethone OMI) consisting of degreaser, prior art sodium persulfate microetch and ENTEK to prepare the copper lands for Surface Mount Technology (SMT) assembly. Boards have frequently been prepared after this xe2x80x9cENTEKxe2x80x9d process, in which the copper circuit lines connecting the gold tabs have been completely, or nearly completely, etched through due to galvanic etch effects.
Yet another example of the deleterious effect of prior art microetchants is the degradation of embedded resistor
tolerances. Buried or embedded resistors are frequently formed on internal layers of PWB using OHMEGA-PLY Resistor/Conductor Foil. Resistors are formed by selective etching of copper circuit lines and the NiP alloy of the resistors. Precision resistor fabrication requires precise control of resistor dimensions (length, width, and thickness). Good resistor precision and uniformity has been achieved on the etched resistors alone, however, this precision and uniformity is frequently lost as these internal layers with resistors are fabricated into the composite wiring board. The resistor precision is lost while preparing the copper surfaces for laminant bond adhesion using a copper oxide or chlorite process. One example of such a process is the Shipley Chlorite process. The first step in the Shipley Chlorite process is a sodium persulfate/sulfuric acid microetch step. The purpose of this microetch is to remove copper oxides and to provide a roughened or microetched copper surface. The microetch step is critical for achieving adequate inner laminant bond strengths. However, this particular microetch chemistry etches NiP alloys almost as aggressively as it etches copper and thus the NiP resistors are attacked, causing significant increases in resistor value and tolerance.
Mechanical microetching has also been employed in the past but especially with miniaturization the components in the package become more susceptible to physical damage and contamination. This is especially true when pumice is used, it is not uncommon to find retained pieces entrapped in the copper foil or in the case of scrubbing using nylon brushes, find gouges in the foil surfaces. In addition, thinner innerlayer materials are susceptible to other defects and damage from aggressive mechanical surface scrubbing, such as distortion and incomplete treatment of copper surfaces due to worn scrubbers or plugged nozzles. Due to these problems substitution to chemical polishing is highly desirable.
With consideration of the aforementioned problems of cleaning the copper surfaces of microelectronic packaging, the present invention provides for novel formulations, and processes of manufacture of microelectronic packages, in particular printed wiring boards, having the following advantages:
a) a rapid and reproducible manufacturing process for the removal of particulate or film impurities adsorbed on the surfaces of copper elements on a microelectronic package;
b) printed wiring boards formed having a high density of excellent quality fine line electrical circuits (i.e., uniform line widths) via a high yielding process;
c) printed wiring boards having superior adhesion between copper surfaces and dielectric materials, resins, etchmasks, etch resists, solder resists, photoresists and electroplated and electrolessly plated noble metals,
d) a process to selectively clean the surface of copper features in a microelectronic package without causing etching of nickel or nickel phosphorous resistor elements,
e) a process to selectively clean the surface of copper features in the proximity of precious metal plated features in a microelectronic package without causing galvanic etching of the bulk copper in the copper features, and
f) a stable, environmentally acceptable, and non-hazardous microetchant formulation.
The microelectronic packages fabricated with the use of the inventive formulation may be double sided or be multilayered having inner circuitry layers separated by resin layers and may optionally contain such features as metallized plated through-holes, contact fingers, connecting pads, and planar resistors. The inventive formulations may be used on copper surfaces during the fabrication of printed wiring boards either in the absence of inert metal features, for example to remove oxide coatings on the copper prior to a solder level process or prior to mounting of electronic parts in order to improve solderability, or in the presence of inert metal features, for example to clean the surface of copper tabs after electroplating with Ni/Au. In the former example, the function of the inventive formulation is to improve adhesion of the solder. In the latter example, it is to clean the surface while not causing accelerated etching of the copper feature. The present formulations can be used to improve adhesion between copper surfaces and coating layers of metals, organic resists, dielectric materials, masking materials, or the like. Although not wishing to be bound by theory, it is believed that the current formulation improves adhesion of copper surfaces to solders and other materials by not only cleaning the surface of the copper but also by micro-roughening the surface. This micro-pitting creates a textured surface that provides greater surface area between the two components.
The current invention can be used during intermediary and final steps in the fabrication of microelectronic packages, in particular, printed wiring boards prepared by either the subtractive, semiadditive or additive process.
It is especially desirable to utilize this inventive microetchant process to fabricate high density microcomponents having selectively plated Ni/Au features since there is a greater likelihood of galvanic etching of the copper fine line circuitry occurring during this process.
It is also especially desirable to utilize this inventive microetchant process to fabricate microelectronic packages containing both copper features and nickel or nickel/phosphorus resistors since minimal etching of the nickel or nickel phosphorous resistor is observed.
The invention described herein is a persulfate microetchant composition useful for removing particulate and film forming impurities on the surface of copper features during fabrication of microelectronic packages. The microetchant is especially characterized by its ability to selectively clean the surface of copper in the presence of nickel or nickel-alloys which may themselves be optionally overplated with noble metal alloys. Prior art references differentiate the xe2x80x9ccleaningxe2x80x9d of a copper surface as removal of the top 1-5 micron of the copper feature compared to xe2x80x9cetchingxe2x80x9d where removal of bulk copper causes gross changes in dimension to the copper feature. This distinction is maintained in the current invention. Furthermore, in the presence of noble or precious metals no deleterious galvanic etching occurs in this etchant-substrate system so that substantially no accelerated etch of the copper features occur. The combination of high selectivity and lack of galvanic etch permits multiple cleaning operations during the intermediary steps of microelectronic fabrication process without significant deterioration of the fine line copper circuitry especially in higher density circuits. The persulfate microetchant composition is stabilized with acid and phosphate salts to provide a process that is stable, fast acting, environmentally acceptable, has high capacity, and can be performed at room temperature. Working microetchant compositions include 25-150 gm/liter sodium persulfate, 0-5% volume % phosphoric acid and 0-0.25 molar sodium phosphate dibasic. Preferred compositions include 50-100 gm/liter sodium persulfate, 1-3% by volume phosphoric acid and 0.05 to 0.15 molar sodium phosphate dibasic.